Details, datasheet, quote on part number: DS Dallas Semiconductor can customize standard products to meet special needs. 7. Measured with outputs open. 8. Pulse width and period specifications may be exceeded; however. Find great deals for 1pcs Ds 5-tap Silicon Delay Line Dip Shop with confidence on eBay! Product Identifiers. BRAND. Dallas Caramel Company. We will hold orders until you are finished buying. | eBay!.
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Delays are stable and precise. Both leading and trailing edge accuracy. Vapor phase, IR and wave solderable.
The DS series delay lines have five equally spaced taps providing delays from 4 ns to ns. These devices are offered in a standard pin DIP that is pin-compatible with hybrid delay lines.
In order to maintain complete pin compatibility, DIP packages are available with hybrid lead configurations.
The DS series delay lines provide a nominal accuracy of. The DS is designed to reproduce both leading and trailing edges with equal precision. Each tap is capable of driving up to ten 74LS loads. Dallas Semiconductor can customize standard products to meet special needs.
For special requests and ds1000a-7s delivery, call High Level Input Voltage.
dallas electronic components
Low Level Input Voltage. High Level Output Current.
Low Level Output Current. Input to Tap Delay leading edge. Input to Tap Delay trailing edge. All tap ds1000w-7s tend to vary uni-directionally with temperature or voltage changes. Intermediate delay values and packaging variations are available on a custom basis.
All voltages are referenced to ground. Measured with outputs open. Pulse width and period specifications may be exceeded; however, accuracy may be impaired depending on application decoupling, layout, etc. Only a operating with a ns period and V. For example a will never exceed 30 mA, etc.
DSS DALLAS Delay Line, Fixed Taps, 1-line, 5-tap, CMOS 16pin SOP 2 piece | eBay
See “Test Conditions” section at the end of this data sheet. The time elapsed between the leading edge of the first pulse and the dalpas edge of the following pulse. The elapsed time on the pulse between the 1. The elapsed time between the 1. Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the DS The input waveform is produced by a precision pulse generator under software control.
Time delays are measured by a time interval counter 20 ps resolution connected between the input and each tap. Each tap is selected and connected to the counter by a VHF switch control unit.
1pcs Ds 5-tap Silicon Delay Line Dip14 | eBay
All measurements are fully automated, with each instrument controlled by a central computer over an IEEE bus. Rise and Fall Time: Each output is loaded with the equivalent of one 74F04 input gate.
Delay is measured at the 1. Above conditions are for test only and do not restrict the operation of the device under other data sheet conditions. Search field Part name Dallws description.